Abstract


  • A set of instructions which contains Opcode & parameters
  • Aka the language the CPU speaks, you can check the ISA of a machine using uname -mp

Portability

Physical implementation of CPU is decoupled. The same Instruction Set Architecture (ISA) can be used on different CPU

App written in X86 can be run on all the CPU that implements the X86

RISC


Easier to Decode

Each Instruction is fixed-sized

Power-Efficient

Needs fewer Transistors (晶体管) to perform simple Operation

Tedious

Complex Computation requires more Instruction to achieve

CISC


  • Stands for Complex instruction set computer
  • Very Complex set of Instruction
  • Can take multiple cycles to execute

Simpler to use

Has many Instruction, to a point complex Computation can be performed with just one Instruction

Requires more transistors

  • CPU design needs to be complex to achieve complex Computation with fewer Instruction, so less Transistors (晶体管) can be used improve overall computing performance
  • Thus, more power-hungry, and more wasted power when performing simple instruction

Harder to decode

4 Types


Accumulator ISA

  1. load A: Load value from Main Memory into accumulator
  2. add B: Add value from Main Memory and value in the accumulator. The sum is stored back to the accumulator
  3. store C: Store value in accumulator into Main Memory

Load-Store ISA

Data Loading

  • Can only load data at Word boundaries

Memory-Memory ISA

Stack ISA

  1. push A, push B: We load values from Main Memory onto the Stack
  2. add: Remove the top 2 values in the Stack, add them, and load the sum onto top of Stack
  3. pop C: Transfer value at top of Stack to Main Memory

References