Abstract


2 main purposes

  1. Storing values during computations like Memory Address & value
  2. Configuring CPU to carry out computations

Registers have no datatypes

For example, add in MIPS assumes the data is in 2’s Complement (补码) and addu assumes the data is unsigned binary number.

The data stored in the register is interpreted according to the instruction that uses it.

Register Allocation

Memory Register


Memory Address Register

Memory Data Register

  • A register temporarily stores data that is being transferred to or retrieved from memory

Common Registers


Instruction Register

  • Holds the actual Instruction that is currently being executed by the CPU

Program Counter

Stack Pointer

offset($sp)

Used to access a memory location relative to the current top of the stack.

; Decrement the stack pointer by 8 (allocate 8 bytes on the stack)
sub $sp, 8 
 
; Move the value at the memory location (sp + 4) into the eax register
mov 4($sp), %eax 

Frame Pointer

  • Maintains a reference point within the current Stack Frame
  • At the beginning of a function (prologue), the Frame Pointer is typically set to the current value of the Stack Pointer, establishing the base of the current stack frame
  • Throughout the function: The FP remains relatively unchanged, offering a stable reference point

Control & Status Registers (CSRs)

  • There are multiple such registers in the CPU, the main purpose is storing information about the current state of the processor or device
  • CSRs are typically used to control various aspects of the processor’s operation, such as interrupt handling, memory management, and power management etc

Terminologies


Register Width

Register File

  • A collection of Register that CPU can use to quickly store and retrieve Data

Memory Mapped Register

  • Register that can be accessed via a Main Memory location
  • This means that the register can be accessed using the same Instruction and addressing modes as memory.
  • Often used to control hardware devices, such as IO Device (Like the UART in XV6) and memory controllers

References