MIPS Data Memory

Abstract

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• Accepts a memory address with Address
• Both MemWrite and MemRead cannot be 1 at the same time. When MemWrite is 1, Write Data is active and data is written to the Address. When MemRead is 1, Read Data is active and data is read from the Address

Important

The result from the ALU is connected to Address. However, some instructions, like the add instruction, don’t involve the data element and would like the ALU result to be written back to a register. That is why we add a multiplexer MemToReg after the Read Data and the ALU result.

Read Data

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• RegDst is set to 0, so the WR is register rt
• ALUSrc is set to 1, so the Immediate value is sent to ALU, instead of RD2
• MemWrite is set to 0, and MemRead is set to 1, so the memory is read-only

Write Data

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• RegDst is set to 0, so the WR is register rt
• ALUSrc is set to 1, so the Immediate value is sent to ALU, instead of RD2
• MemWrite is set to 1, and MemRead is set to 0, so the memory is write-only

Important

There is a wire between the RD2 and Write Data, so the data inside register rt can be written back to the memory.